1. Field of the Invention
Example embodiments of the present invention relate to memory devices (e.g., nonvolatile memory devices), which may include at least one barrier (e.g., multilayered tunneling barrier) and methods of manufacturing the same. For example, in one or more example embodiments of the present invention, a tunneling barrier layer may be formed in a nonvolatile memory device using a plurality of dielectric layers and methods of manufacturing the same. The dielectric layers may have different bandgap energies.
2. Description of the Related Art
A semiconductor memory device may be a volatile memory device or a nonvolatile memory device. A volatile memory device may be a memory, such as, a dynamic random access memory (DRAM), a static random access memory (SRAM), etc. If power is supplied to a volatile memory device, data may be input to, or output from, the device. If power is interrupted, data may be lost. In a nonvolatile memory device, if power is interrupted, the memory device may retain the data stored therein. A flash memory device is an example of a nonvolatile memory device.
FIG. 1 is a cross sectional view showing an example structure of a related art nonvolatile memory device, for example, a floating gate type flash memory device. Referring to FIG. 1, a source region 12a and/or a drain region 12b may be implanted with dopant (e.g., impurities). The source region 12a and/or the drain region 12b may be prepared in a substrate (e.g., a semiconductor substrate) 11. A channel region 13 may be formed in, or on, the substrate 11, for example, between the source and drain regions 12a and 12b. A gate structure 14 may be formed on the channel region 13. The channel region 13 may be in contact with the source and/or drain regions 12a and 12b. The gate structure 14 may include a barrier layer (e.g., tunneling barrier layer) 15, a floating gate 16, an oxide layer (e.g., a blocking oxide layer) 17, and/or a gate electrode layer 18. The barrier layer 15, gate 16, layers 17 and 18 may be formed, for example, sequentially. The gate electrode layer 18 may be formed of a conductive material. The barrier layer 15 may be formed of a dielectric material, and the floating gate 16 may be formed of, for example, polysilicon or any other suitable, similar material.
In the related art nonvolatile memory device shown in FIG. 1, the types and/or thicknesses of respective layers may be at, or near, a physical limit. For example, the barrier layer 15 may not be formed to less than a thickness of about 6 to 7 nm.